Instruction decoding in the Intel 8087 floating-point chip

(righto.com)

4 points | by pwg 9 hours ago ago

4 comments

  • kens 9 hours ago ago

    Author here for all your 8087 questions...

    • rogerbinns an hour ago ago

      Do you know what other prior systems did for co-processor instructions? The 8086 and 8087 must have been designed together for this approach to work, so presumably there is a reason they didn't choose what other systems did.

      It is notable that ARM designed explicit co-processor instructions, allowing for 16 co-processors. They must have taken the 8086/8087 approach into account when doing that.

    • pwg 8 hours ago ago

      Ken,

      Way back (circa 1988ish timeframe) I remember a digital logic professor giving a little aside on the 8087 and remarking at the time that it (the 8087) used some three value logic circuits (or maybe four value logic). That instead of it being all binary, some parts used base 3 (or 4) to squeeze more onto the chip.

      From your microscopic investigations, have you seen any evidence that any part of the chip uses anything other than base 2 logic?

      • kens 3 hours ago ago

        The ROM in the 8087 was very unusual: It used four transistor sizes so it could store two bits per transistor, so the storage was four-level. Analog comparators converted the output from the ROM back to binary. This was necessary to fit the ROM onto the die. The logic gates on the chip were all binary.

        I wrote about this in detail a few years ago: https://www.righto.com/2018/09/two-bits-per-transistor-high-...