Show HN: Build a CPU from gates, in TypeScript, in the browser

(play.simten.dev)

4 points | by charlesfrisbee 21 hours ago ago

5 comments

  • veexx103 8 hours ago ago

    Ten years ago, I worked on something similar for my graduation project.

    I drew inspiration from the circuit simulator in SICP and a tool called Logisim,

    and used Lisp to design a circuit simulation library.

    The core concept was:

    Each function could generate a circuit module,

    that accepted multiple input lines—each consisting of multiple bits,

    and produced a single output line, which also consisted of multiple bits.

    For example, an adder would take two $n$-bit lines as input and output a single $n$-bit line.

    Using this simulation library, I also built a simple CPU and implemented a factorial function using its machine language.

    • charlesfrisbee 7 hours ago ago

      Interesting! Did you ever open source it? Would love to take a look. I wanted to have something that ran natively in the browser/node to have Logisim's ease of getting started/interactivity, while also being able to piggyback off Typescript's language features and the npm ecosystem.

      I was also heavily inspired by the Steam game 'Turing Complete' but wanted something code based to not need to manually wire in the GUI. Thanks for taking a look

      • veexx103 5 hours ago ago

        Here is my code:

        https://github.com/mindChickey/circuit/tree/master/cirlisp

        There is no documentation, but I think the design is worth a look.

        The specific language doesn't matter much; using TypeScript to run it in the browser is a good choice.

        As for a graphical interface for wires and gates—I don't think it's necessary;

        Expressing it directly in code is more efficient..

        • charlesfrisbee 3 hours ago ago

          Thanks for sharing, will take a proper look later, but looks like you model latency which is something I wanted to include but couldn't think of a way that wouldn't take away from the simplicity of the model.

          I agree code as source of truth is a must and GUI is not necessary for authoring, everything I built (Snake, Pong, the RISCV CPU) was done headlessly in node with the help of Claude working to a spec just using the @simten/core lib on npm.

          I just built a readonly ui-layer on top with the hope of making it more accessible to students/learners starting out in the space, the main features being able to visually scrub between cycles and drill down into the internals of an abstracted component. I also have a Verilog import thing I've been working on to allow learners to visualise and poke around in the browser

          • veexx103 2 hours ago ago

            I once thought about generating visual representations of circuits created from code.

            For instance, if you clicked on an n-bit adder,

            you could see how it was recursively generated,

            showing that it consists of a 1-bit adder combined with an (n-1)-bit adder.

            I think that would be really interesting, but I just haven't had the time to actually do it.